OptiMOSTM OptiMOSTMFD Power-Transistor, 250 V

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1 MOSFET MetalOxideSemiconductorFieldEffectTransistor OptiMOS TM DataSheet Rev.2. Final PowerManagement&Multimarket

2 1Description Features N-channel,normallevel FastDiode(FD)withreducedQrr Optimizedforhardcommutationruggedness Verylowon-resistanceRDS(on) 175 Coperatingtemperature Pb-freeleadplating;RoHScompliant QualifiedaccordingtoJEDEC 1) fortargetapplication Halogen-freeaccordingtoIEC TO-22-3 tab Table1KeyPerformanceParameters Parameter Value Unit VDS 25 V RDS(on),max 22 mω ID 61 A Gate Pin 1 Drain Pin 2, tab Source Pin 3 Type/OrderingCode Package Marking RelatedLinks PG-TO N25NF - 1) J-STD2 and JESD22 2

3 TableofContents Description Maximum ratings Thermal characteristics Electrical characteristics Electrical characteristics diagrams Package Outlines Revision History Disclaimer

4 2Maximumratings attj=25 C,unlessotherwisespecified Table2Maximumratings at 25 C Values Parameter Symbol Unit Note/TestCondition Min. Typ. Max. Continuous drain current ID A TC=25 C TC=1 C Pulsed drain current 1) ID,pulse A TC=25 C Avalanche energy, single pulse EAS mj ID=37A,RGS=25Ω Reversediodepeakdv/dt dv/dt kv/µs ID=122A,VDS=125V, di/dt=15a/µs,tj,max=175 C Gate source voltage VGS -2-2 V - Power dissipation Ptot W TC=25 C Operating and storage temperature Tj,Tstg C IEC climatic category; DIN IEC 68-1: 55/175/56 3Thermalcharacteristics Table3Thermalcharacteristics Values Parameter Symbol Unit Note/TestCondition Min. Typ. Max. Thermal resistance, junction - case RthJC K/W - Thermal resistance, junction - ambient, minimal footprint RthJA K/W - Thermal resistance, junction - ambient, 6 cm2 cooling area 2) RthJA K/W - 1) See figure 3 2) Device on 4 mm x 4 mm x 1.5 mm epoxy PCB FR4 with 6 cm 2 (one layer, 7 µm thick) copper area for drain connection. PCB is vertical in still air. 4

5 4Electricalcharacteristics Table4Staticcharacteristics Parameter Symbol Values Min. Typ. Max. Unit Note/TestCondition Drain-source breakdown voltage V(BR)DSS V VGS=V,ID=1mA Gate threshold voltage VGS(th) V VDS=VGS,ID=27µA Zero gate voltage drain current IDSS µa VDS=2V,VGS=V,Tj=25 C VDS=2V,VGS=V,Tj=125 C Gate-source leakage current IGSS na VGS=2V,VDS=V Drain-source on-state resistance RDS(on) mω VGS=1V,ID=61A Gate resistance RG Ω - Transconductance gfs S VDS >2 ID RDS(on)max,ID=61A Table5Dynamiccharacteristics Values Parameter Symbol Unit Note/TestCondition Min. Typ. Max. Input capacitance Ciss pf VGS=V,VDS=125V,f=1MHz Output capacitance Coss pf VGS=V,VDS=125V,f=1MHz Reverse transfer capacitance Crss pf VGS=V,VDS=125V,f=1MHz Turn-on delay time td(on) ns Rise time tr ns Turn-off delay time td(off) ns Fall time tf ns VDD=125V,VGS=1V,ID=3.5A, RG,ext=1.6Ω VDD=125V,VGS=1V,ID=3.5A, RG,ext=1.6Ω VDD=125V,VGS=1V,ID=3.5A, RG,ext=1.6Ω VDD=125V,VGS=1V,ID=3.5A, RG,ext=1.6Ω Table6Gatechargecharacteristics 1) Values Parameter Symbol Unit Note/TestCondition Min. Typ. Max. Gate to source charge Qgs nc VDD=125V,ID=61A,VGS=to1V Gate to drain charge Qgd nc VDD=125V,ID=61A,VGS=to1V Switching charge Qsw nc VDD=125V,ID=61A,VGS=to1V Gate charge total Qg nc VDD=125V,ID=61A,VGS=to1V Gate plateau voltage Vplateau V VDD=125V,ID=61A,VGS=to1V Output charge Qoss nc VDD=125V,VGS=V 1) See Gate charge waveforms for parameter definition 5

6 Table7Reversediode Parameter Symbol Values Min. Typ. Max. Unit Note/TestCondition Diode continous forward current IS A TC=25 C Diode pulse current 1) IS,pulse A TC=25 C Diode hard commutation current 2) IS,hard A - Diode forward voltage VSD V VGS=V,IF=61A,Tj=25 C Reverse recovery time trr ns VR=1V,IF=42.7A,diF/dt=1A/µs Reverse recovery charge Qrr nc VR=1V,IF=42.7A,diF/dt=1A/µs 1) Diode pulse current is defined by thermal and/or package limits 2) Maximum allowed hard-commutated current through diode at di/dt=15 A/µs 6

7 5Electricalcharacteristicsdiagrams Diagram1:Powerdissipation 32 Diagram2:Draincurrent Ptot[W] ID[A] TC[ C] Ptot=f(TC) TC[ C] ID=f(TC);VGS 1V Diagram3:Safeoperatingarea 1 3 Diagram4:Max.transientthermalimpedance 1 1 µs µs 1 µs.5 ID[A] ms 1 ms ZthJC[K/W] DC VDS[V] ID=f(VDS);TC=25 C;D=;parameter:tp 1-2 single pulse tp[s] ZthJC=f(tp);parameter:D=tp/T 7

8 Diagram5:Typ.outputcharacteristics 15 Diagram6:Typ.drain-sourceonresistance V 7 V V 5 V 1 5 V 2 7 V 1 V ID[A] 75 RDS(on)[mW] V VDS[V] ID=f(VDS);Tj=25 C;parameter:VGS ID[A] RDS(on)=f(ID);Tj=25 C;parameter:VGS Diagram7:Typ.transfercharacteristics 12 Diagram8:Typ.forwardtransconductance ID[A] 6 gfs[s] C 25 C VGS[V] ID=f(VGS); VDS >2 ID RDS(on)max;parameter:Tj ID[A] gfs=f(id);tj=25 C 8

9 Diagram9:Drain-sourceon-stateresistance 7 Diagram1:Typ.gatethresholdvoltage µa RDS(on)[mW] % typ VGS(th)[V] µa Tj[ C] RDS(on)=f(Tj);ID=61A;VGS=1V Tj[ C] VGS(th)=f(Tj);VGS=VDS;parameter:ID Diagram11:Typ.capacitances Diagram12:Forwardcharacteristicsofreversediode 1 4 Ciss C 175 C 25 C, 98% 175 C, 98% 1 3 Coss 1 2 C[pF] 1 2 IF[A] 1 1 Crss VDS[V] C=f(VDS);VGS=V;f=1MHz VSD[V] IF=f(VSD);parameter:Tj 9

10 Diagram13:Avalanchecharacteristics 1 2 Diagram14:Typ.gatecharge V 1 C 25 C V IAS[A] C VGS[V] 4 5 V tav[µs] IAS=f(tAV);RGS=25Ω;parameter:Tj(start) Qgate[nC] VGS=f(Qgate);ID=61Apulsed;parameter:VDD Diagram15:Drain-sourcebreakdownvoltage 29 Gate charge waveforms VBR(DSS)[V] Tj[ C] VBR(DSS)=f(Tj);ID=1mA 1

11 OptiMOSTMFD Power-Transistor, 25 V 6 Package Outlines Figure 1 Outline PG-TO22-3, dimensions in mm/inches 11 Rev. 2.,

12 OptiMOSTMFD Power-Transistor, 25 V Revision History Revision: , Rev. 2. Previous Revision Revision Date Subjects (major changes since last revision) Release of final version We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: erratum@infineon.com Published by Infineon Technologies AG München, Germany 214 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office ( Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. The Infineon Technologies component described in this Data Sheet may be used in life-support devices or systems and/or automotive, aviation and aerospace applications or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support, automotive, aviation and aerospace device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. 12 Rev. 2.,

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